#ifndef REG_BASE_ADDR_H_
#define REG_BASE_ADDR_H_


#define UART1_BASE_ADDR (0x50084000)
#define UART2_BASE_ADDR (0x50084800)
#define UART3_BASE_ADDR (0x50085000)

#define LSBSTIM_BASE_ADDR (0x50080000)
#define LSGPTIMA_BASE_ADDR (0x50080800)
#define LSGPTIMB_BASE_ADDR (0x50081000)
#define LSGPTIMC_BASE_ADDR (0x500818000)
#define LSADTIM_BASE_ADDR (0x50082000)


#define DMAC1_BASE_ADDR (0x50008000)

#define CACHE_BASE_ADDR (0x5000a000)

#define CALC_BASE_ADDR (0x50012000)

#define LSQSPI_BASE_ADDR (0x50000000)

#define LSQSPI_MEM_MAP_BASE_ADDR (0x00800000)

#define FLASH_BASE_ADDR (LSQSPI_MEM_MAP_BASE_ADDR)

#define LSPDM_BASE_ADDR (0x50088000)

#define LSIWDG_BASE_ADDR (0x5000f0080)

#define SYSC_BLE_BASE_ADDR (0x5001a000)

#define MAC_BASE_ADDR (0x50020000)

#define RF_BASE_ADDR (0x50018000)

#define LSPATCH_BASE_ADDR (0x5000b000)

#define I2C1_BASE_ADDR (0x50082800)
#define I2C2_BASE_ADDR (0x50083000)
#define I2C3_BASE_ADDR (0x50083800)

#define LSECC_BASE_ADDR (0x50011000)
#endif
